TSMC (TSM)
Thesis verdict: holds, with conditions — AI demand has lifted advanced nodes to 74% of revenue, but massive 2026 capex and overseas fab construction will push up depreciation; holding a gross margin near 60% depends heavily on advanced-node price increases and extremely high utilization.
TSMC is the world's largest pure-play foundry. Its core operating principle is "never compete with customers": it manufactures chips on behalf of fabless design giants (such as Nvidia, AMD and Apple) and integrated device manufacturers. Revenue comes from wafer shipments and advanced-process fees; the cash comes directly from chip-design customers' purchases and from the hard prepayments they make to lock in scarce future capacity.
Within TSMC's business mix, high-performance computing (HPC) has become the undisputed first growth engine. In fiscal 2025, HPC platform revenue jumped 48% year over year to NT$2,192.931B, 58.0% of total revenue. Of the company's total revenue increase of NT$914.746B, HPC alone contributed NT$716.040B — a 78.3% share of the increment. The direct driver is the global AI infrastructure build-out frenzy: the world's major compute-chip giants depend heavily on TSMC's advanced-process capacity, and as industry coverage puts it, Nvidia and AMD can't make AI chips without it (2026-09-22).
The Smartphone platform is TSMC's second-largest base, at 29.0% of fiscal 2025 revenue and 11.6% of the year-over-year increase. Thanks to rigid demand from flagship smartphones for top-end 3nm chips, the segment performed steadily overall. The remaining segments are smaller by comparison: Automotive is 5.0% of revenue and 5.2% of the increase, gradually ramping the automotive-grade N3A advanced process; IoT is 5.0% of revenue and 2.8% of the increase, growing relatively mildly with the pace of edge-compute penetration; Digital Consumer Electronics (DCE) is only 1.0% of revenue with an increment contribution close to 0%; Other is 2.0% of revenue and 2.1% of the increase.
By industry layer and workflow depth, TSMC not only owns vast heavy-asset fabs but, through its own Open Innovation Platform (OIP) and process design kits (PDKs — the process-translation interface between chip design and manufacturing), binds the world's design-software (EDA) vendors, intellectual-property (IP) suppliers and customers' blueprints tightly together. In the generic value stack it spans the heavy-asset manufacturing layer and the proprietary system-wiring layer. Once a chip-design customer has taped out (handed over to the fab for trial production) on a process node, switching foundries midway means years of time and hundreds of millions of dollars to rewrite the physical layouts. That extremely high switching cost lets TSMC sit firmly inside downstream design companies' core processes.
In advanced processes at 7nm and below (74% of wafer revenue), TSMC has not been commoditized; on the contrary, its monopoly position has further established an asset premium. This deeply bound production relationship with customers is the solid defensive line for its long-term margins.